RISC-V Processors


Codasip’s RISC-V based processors (Codix-Bk) leverage the rich ecosystem of software and hardware enabled by the extensible, RISC-V Instruction-Set Architecture (ISA) Standard, while retaining the incredible flexibility of all Codix Cores.

“Codasip and RISC-V enable all the advantages of application tailoring, with the stability and predictability of off-the-shelf ARM designs, while delivering an order of magnitude performance improvement.”Derek Atkins, CTO, SecureRF

Codasip Partner Network

Companies developing compelling technology built on Codasip solutions.

  • IP companies
  • Software providers
  • Service companies

RISC-V Foundation

Broad ecosystem of companies devoted to development of an open, extensible ISA.

  • Codasip is a founding member
  • >40 companies including Google, HP, AMD
  • Ecosystem built on standard extensible ISA

Codasip Partner Network

Companies developing compelling technology built on Codasip solutions.

  • IP companies
  • Software providers
  • Service companies

RISC-V Foundation

Broad ecosystem of companies devoted to development of an open, extensible ISA.

  • Codasip is a founding member
  • >40 companies including Google, HP, AMD
  • Ecosystem built on standard extensible ISA

Proven processor implementations


Codasip currently offers three different base versions of the RISC-V architecture: with a 1-stage pipeline, with a 3-stage pipeline, and with a 5-stage pipeline. All are fully compliant with the RISC-V specification, and fully customizable.

In addition to the base processor implementation, Codasip provides standard support for optional instruction layers as defined by the current RISC-V specification.

 

 

Codix-Bk1

Codix-Bk3

Codix-Bk5

 

 

Base Integer ISA

RV32E

RV32E/I

RV32I

 

 

Compressed ISA

Optional

Optional

 

 

Single Precision “F”

Optional

 

 

Multiplication and Division “M”

Optional
(sequential)

Optional
(sequential/parallel)

Parallel

 

 

User mode (subset of privilege mode) “U”

Optional

Optional

 

 

Interrupt support

 

 

Jump predictor

 

 

JTAG Debug Support

 

Completely customizable


Like all Codix Cores, Codix-Bk variants are fully customizable to the needs of your design. Changes can be made by Codasip as part of the standard deliverable, or by your own developers using our unique IP Generation Toolkit (Codasip Studio).

Need a single cycle MAC, specialized Crypto functions, or support for non-standard data types – no problem. Better yet, thanks to the extensible nature of the RISC-V ISA, all tailored cores remain RISC-V compliant, allowing you to leverage the growing SW Ecosystem.

State-of-the-art Commercial SDK Support


Codix-Bk cores are supported by the same industry-leading SDK as other Codix Cores. This SDK is based on LLVM, GNU and other open standards, but is optimized for your unique processor configuration. Better yet, it is backed by Codasip’s comprehensive support.

Open, Extensible, Industry supported


Codasip is proud to be a founding member of the RISC-V Foundation, joining industry leaders Google, Oracle, HP, AMD, Nvidia, and many others.

The power of RISC-V is that it defines the ISA on which healthy HW and SW ecosystems can develop, allowing each vendor to deliver their own unique value.

RISC-V is a natural fit to Codasip since it extends the ecosystem available to our customers, allowing us to maximise the value of our products within that ecosystem while minimising the Total Cost of Ownership (TCO) for our customers.