Codasip and UltraSoC collaborate on RISC-V trace support

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UltraSoC today announced its work on adding trace functionality to the RISC-V specification, and Codasip along with 4 other IP vendors have pledged support. Read more in the announcement at http://www.ultrasoc.com/ultrasoc-announces-industrys-first-processor-trace-support-risc-v/

Learn about RISC-V and IoT @54thDAC

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Codasip is excited to be a co-presenter at this year’s DAC with Vijay Subramaniam, Head of IC Design at Microsemi Corp. Our presentation is Tuesday, June 20th at 1:30pm in Ballroom F. The session is 24.3, our paper is titled “Implementing RISC-V for IoT Applications”. If you would like to arrange a meeting during DAC please email [email protected]

Visit Codasip @ChipEx2017

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We are once again excited to be part of ChipEx2017, the largest annual event of the Israeli microelectronics industry. The event takes place May 9-10, 2017 in Tel Aviv. Drop by our booth to learn about the exciting development in our Codix Cores – especially our newest RISC-V offerings, as well the latest that Codasip studio has to offer. If …

Codasip at the RISC-V workshop, Shanghai, China

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As an founding member of the RISC-V foundation, we are excited to be once again part of the latest RISC-V workshop being held May 8-11 in Shanghai China. On the Monday tutorial session we will be presenting an overview of our technology, and at 3:00PM on Tuesday our verification lead Marcela Zachariasova will co-present with Mentor Graphics our approach to streamlining …

Visit Codasip @REUSE2016

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Visit Codasip at REUSE2016. We are happy to be part of REUSE2016 event Dec 1st 2016 with Codasip RISC-V processor IP and Processor development tools. http://www.reuse2016.com/

Visit Codasip @SemIsrael

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We are excited to be part of the SemIsrael event Nov 15th 2016. If you are planning on being there drop by and find out more about Codasip IP, RISC-V and Processor development tools. http://expo.semisrael.com/exhibition

RISC-V Demo at Linley Processor Conference

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We are proud to have the opportunity to be part of the RISC-V (riscv.org) activities at this years Linley Processor Conference. If you are planning on being there drop by the RISC-V demo table during the Tuesday Reception and say Hi. We will be demoing a Quantum Resistant Security implementation by SecureRF built on an extended version of our Codix-Bk …