When a bug really is a feature

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How the RISC-V memory model bug shows the real power of an open ISA. No doubt some of you have read about the problem in the proposed RISC-V memory model that received a lot of publicity last week (http://www.princeton.edu/engineering/news/archive/?id=17707), and if you have, it’s also worth looking at the formal response on the RISC-V website (https://riscv.org/2017/04/risc-v-memory-consistency-model/). They talk a lot …

RISC-V’s Impact on Processor IP Licensing Fees

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… and why you should never believe the incumbent market leader when their market is being disrupted. One subtle way to detect that a mature market is being disrupted is to closely observe the behavior of the market leader. If they “stay the course” you can be reasonably confident that the game changing technology and/or the challenging startup company they …

Exponential Growth of Embedded Processor Innovation

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Driven by open standards, and an ecosystem built on co-operation The amazing thing about exponential growth is that you cannot see it when you are looking at it, you can only see it in hindsight. An unrelated, but very interesting reference to this is comes from a blog on the topic of AI http://waitbutwhy.com/2015/01/artificial-intelligence-revolution-1.html. The blog has nothing to do …

Disruption in the Embedded Processor Market

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… and it’s not why you expected. Dan Ganousis Codasip, LTD   Big change is occurring in the embedded processor market … and surprisingly, it’s not just because of RISC-V. If you didn’t spend 2016 stranded on an abandoned island, you’re likely aware of the phenomenal growth of the RISC-V open-source ISA movement. Much the same way Linux quickly outgrew …

RISC-V: Reducing Risk for Both the Consumer and the Supplier

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Last week was the Linley Processors Conference held in Santa Clara, CA. where vendors announced new products and technical details about new network architectures, security implementations, and novel memory devices were disclosed. Session 8 was titled “Open Instruction Sets” and featured a “pro” presentation by Krste Asanović, Professor, University of California, Berkeley and Chairman, RISC-V foundation, followed by a “con” …

What is RISC-V?
Why Do We Care and Why You Should Too!

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I’d like to start by talking about the biggest misconception regarding RISC-V. Many of you who have heard about RISC-V likely believe it is an open-source processor … but it is not. So what is it? RISC-V is an open specification of an Instruction Set Architecture (ISA). That is, it describes the way in which software talks to an underlying …

Good Security shouldn’t be at the expense of HW or SW

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It seems like not a day goes by without another article on poor security of IoT and consumer devices. As IoT becomes more pervasive, ever more devices will connect together, and security will make or break not only a product, but whole companies. How did we get to this point? Is it that people don’t care about security? Of course …

A better Way to embed

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3 Ways to Create Better Connected Devices for the Internet of Things By now we’ve all heard how the Internet of Things is going to dramatically change our world. Very soon too, we’ve been threatened loudly by the press. These days it is hard to visit a tech company’s website or attend a tech trade show without feeling “IoT” has …

Welcome to our new site

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As you can see Codasip has a new look, a new website, and for the first time this blog area which will allow us to share ideas and connect with all of you. If you have suggestions for topics you would like to see addressed, please make them in the comments section of this post.