The Newest Codasip RISC-V Processor is Ideal for IoT Designs
Brno, Czech Republic – August 21st 2017 – Codasip, the leading supplier of RISC-V® embedded CPU cores, today announced the newest addition to their Berkelium (Bk) family of RISC-V processors. The Codasip Bk-1 processor is an FSM processor targeted at the Internet of Things (IoT) by offering ultra-low power, the lowest cost of all comparable embedded processors, and optimal performance/power efficiency.
Karel Masařík, CEO and founder of Codasip, stated: “This processor is perfect for IoT ASIC designers looking to move up from 8-bit processors to 32-bit processors. Like all members of the Codasip Bk family of processors, the Bk-1 is fully compliant with the RISC-V open standard, assuring customers that their embedded software is truly portable and their designs are not locked into a proprietary instruction set architecture (ISA) such as Arm.”
The Bk-1 processor was designed to provide impressive 32-bit performance, small code size, and minimal power, area, and cost. In its basic configuration, the Bk-1 starts at 9k gates while delivering a maximum clock frequency of up to 350 MHz in a 55nm process. The Bk-1 has an optional power management unit, JTAG debug controller, and bridges to the AMBA buses so it can be easily integrated into existing Arm designs.
Codasip provides their customers with high-level design tools that automatically profile the embedded SW and allow ASIC designers to tailor the Bk-1 processor exactly to its intended application. This unique ability to automatically modify the Codasip cores results in far better implementations compared to other processor IP vendors, and allows for the process to be easily completed in a day or two with the silicon proven Codasip Studio tool suite.
“Codasip’s new Bk-1 processor is another great milestone for the RISC-V ecosystem and shows ongoing market growth of its open and free architecture,” said Rick O’Connor, executive director of the non-profit RISC-V Foundation. “The Foundation will continue to support member organizations, such as Codasip, in bringing to market RISC-V-based processors that enable new designs and innovation.”
Codasip delivers leading-edge processor IP and high-level design tools that provide ASIC designers with all the advantages of an open standard, such as the RISC-V ISA, along with the unique ability to automatically optimize the processor IP. As a founding member of the RISC-V foundation (riscv.org) and a long-term supplier of LLVM and GNU based processor solutions, Codasip is committed to open standards for embedded processors. Formed in 2006 and headquartered in Brno, Czech Republic, Codasip currently has offices in the US and Europe, with representatives in Asia and Israel. More information on Codasip’s products and services is available at www.codasip.com.
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