Application-specific instruction-set processors (ASIPs) are key building blocks of multi-processor systems on a chip (MPSoCs) that power today’s electronic systems. ASIPs deliver greater computational efficiencies than merchant processors and more flexibility than fixed-function RTL designs. They are the ideal technology to consider for performance and power sensitive design elements in next-generation SoCs. Thanks to ASIPs architectural specialization, combined with instruction-level and data-level parallelism, ASIPs can offer performance and energy characteristics that are superior to general-purpose processors. Thanks to their software programmability, ASIPs offer the flexibility to cope with multiple algorithmic standards and floating specifications. ASIPs form the heart of advanced multi-processor Systems on a Chip. Many SoC designs today employ multiple processors. As SoC design becomes more complex, new methods to describe, debug and profile overall system performance need to be employed.
Today's system-on-chip (SoC) designers are tasked with a key challenge of developing complex products and getting them to market in minimal amount of time. To achieve these design goals, designers rely on using large amounts of Intellectual Property (IP), allowing more time for focusing on the value and differentiation of their product. Codasip® provides comprehensive solutions that align tools, IP and services together to address these challenges and help bring the complex solutions to market.
Thanks to the architectural exploration capabilities of the Codasip® retargetable tool suite, based on the ISAC processor description language, designers can determine the optimal operation point in the spectrum of architectural solutions for their application.
